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| NTLTS3107P Power MOSFET Features -20 V, -8.3 A, Single P-Channel, Micro8 Leadless Package * * * * * Low RDS(on) for Extended Battery Life Surface Mount Micro8 Leadless for Improved Thermal Performance Low Profile (<1.0 mm) Optimal for Portable Designs Low Turn-On Voltage This is a Pb-Free Device http://onsemi.com V(BR)DSS -20 V RDS(on) TYP 12.2 mW @ -4.5 V 15.6 mW @ -2.5 V 26.2 mW @ -1.8 V P-Channel MOSFET S Value -20 $8.0 -8.3 -6.0 -12 PD ID PD IDM TJ, TSTG IS TL 1.6 3.3 TA = 25C TA = 85C TA = 25C tp = 10 ms -5.9 -3.7 0.8 -25 -55 to 150 -1.6 260 W A C A C Drain Symbol RqJA RqJA RqJA Max 80 38 160 Unit C/W C/W C/W Drain Drain Drain A 1 Micro8 Leadless CASE 846C A Y WW G W D Unit V V A G ID MAX -8.3 A Applications * Optimized for Load Management Applications * Charge Control in Battery Powered Systems * Cell Phones, DSC, Notebooks, Portable Games, etc. MAXIMUM RATINGS (TJ = 25C unless otherwise stated) Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current (Note 1) Steady State t v 10 s Power Dissipation (Note 1) Continuous Drain Current (Note 2) Power Dissipation (Note 2) Pulsed Drain Current (Note 1) Steady State t v 10 s Steady State TA = 25C TA = 85C TA = 25C TA = 25C Symbol VDSS VGS ID MARKING DIAGRAM 1 3107 AYWW G Operating Junction and Storage Temperature Source Current (Body Diode) Lead Temperature for Soldering Purposes (1/8 in from case for 10 s) = Assembly Location = Year = Work Week = Pb-Free Package PIN ASSIGNMENT 8 7 6 5 1 THERMAL RESISTANCE RATINGS Parameter Junction-to-Ambient - Steady State (Note 1) Junction-to-Ambient - t v 10 s (Note 1) Junction-to-Ambient - Steady State (Note 2) Source Source Source Gate Drain 2 3 4 Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Surface-mounted on FR4 board using 1 sq. in. pad size (Cu. area = 1.127 sq. in. [1 oz] including traces). 2. Surface-mounted on FR4 board using minimum recommended pad size (Cu. area = TBD sq. in.). (Bottom View) ORDERING INFORMATION Device NTLTS3107PR2G Package Micro8 (Pb-Free) Shipping 2500/Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. (c) Semiconductor Components Industries, LLC, 2005 October, 2005 - Rev. 0 1 Publication Order Number: NTLTS3107P/D NTLTS3107P ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified) Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-to-Source Leakage Current ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain-to-Source On Resistance VGS(TH) VGS(TH)/TJ RDS(on) VGS = VDS, ID = -250 mA VGS = -4.5 V, ID = -8.0 A VGS = -2.5 V, ID = -7.0 A VGS = -1.8 V, ID = -5.8 A Forward Transconductance CHARGES AND CAPACITANCES Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate-to-Source Gate Charge Gate-to-Drain "Miller" Charge SWITCHING CHARACTERISTICS (Note 4) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time td(on) tr td(off) tf VSD tRR ta tb QRR VGS = 0 V, dIS/dt = 100 A/ms, IS = -1.6 A TJ = 25C TJ = 125C VGS = -4.5 V, VDS = -10 V, ID = -8.0 A, RG = 3.0 W 30 20 250 80 ns CISS COSS CRSS QG(TOT) QG(TH) QGS QGD VGS = -4.5 V, VDS = -16 V, ID = -8.0 A VGS = 0 V, f = 1 MHz, VDS = -16 V 4645 465 285 40 3.0 7.0 11 6500 650 400 60 nC pF gFS VDS = -5 V, ID = -8.0 A -0.45 3.4 12.2 15.6 26.2 25 S 16 21 -1.2 V mV/C mW V(BR)DSS V(BR)DSS/TJ IDSS IGSS VGS = 0 V, VDS = -16 V TJ = 25C VGS = 0 V, ID = -250 mA -20 11 -10 100 V mV/C mA nA Symbol Test Condition Min Typ Max Unit VDS = 0 V, VGS = $8.0 V DRAIN-SOURCE DIODE CHARACTERISTICS (Note 3) Forward Diode Voltage VGS = 0 V, IS = -1.6 A -0.7 0.5 75 28 47 81.5 nC 100 ns -1.2 V Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge 3. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 NTLTS3107P 32 -ID, DRAIN CURRENT (A) VGS = 10 V 5V 24 3.6 V 16 3.2 V 2.8 V 2.4 V 8 1.2 V 0 2 4 2V 1.8 V 6 8 10 0 0 32 4.5 V -ID, DRAIN CURRENT (A) 4V 24 16 TJ = 125C TJ = 25C TJ = -55C 8 0 2 4 6 -VDS, DRAIN-TO-SOURCE VOLTAGE (V) -VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) Figure 2. Transfer Characteristics 0.026 VGS = -4.5 V 0.022 TJ = 125C 0.018 TJ = 25C 0.014 TJ = -55C 0.01 0 5 10 15 20 -ID, DRAIN CURRENT (A) 25 30 0.026 VGS = -2.5 V 0.022 TJ = 125C 0.018 TJ = 25C 0.014 TJ = -55C 0.01 0 5 10 15 20 -ID, DRAIN CURRENT (A) 25 30 Figure 3. On-Resistance versus Drain Current and Temperature RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 0.02 TJ = 25C 0.019 0.018 0.017 0.016 0.015 VGS = 4.5 V 0.014 0 6 12 18 24 30 VGS = 3.5 V VGS = 2.5 V RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 0.06 0.055 0.05 0.045 0.04 0.035 0.03 0.025 0.02 0.015 0.01 1 Figure 4. On-Resistance versus Drain Current and Temperature ID = 13.2 A ID = 3.5 A 2 3 4 5 -ID, DRAIN CURRENT (A) VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 5. On-Resistance versus Drain Current and Gate Voltage Figure 6. On-Resistance versus Gate Voltage http://onsemi.com 3 NTLTS3107P RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 1.4 ID = -8 A VGS = -4.5 V 1.2 -VGS, THRESHOLD VARIANCE (V) 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -50 ID = -250 mA 1 0.8 0.6 -50 -25 0 25 50 75 100 125 150 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (C) TJ, JUNCTION TEMPERATURE (C) Figure 7. On-Resistance Variation with Temperature -VGS, GATE-TO-SOURCE VOLTAGE (V) 10000 8000 C, CAPACITANCE (pF) 6000 4000 2000 0 0 4 8 12 16 TJ = 25C VGS = 0 V Ciss 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0 10 Figure 8. Threshold Voltage ID = 3.2 A TJ = 25C Coss 20 20 30 40 50 60 GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC) Figure 9. Capacitance Variation Figure 10. Gate-to-Source and Drain-to-Source Voltage versus Total Charge 10000 -IS, SOURCE CURRENT (A) VDS = -10 V ID = -1 A VGS = -10 V td(off) 100 tf 100 VGS = 0 V TJ = 25C 1000 t, TIME (ns) 10 1 10 td(on) tr 1 1 10 RG, GATE RESISTANCE (W) 100 0.1 0 0.4 0.8 1.2 1.6 2 -VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 11. Resistive Switching Time Variation versus Gate Resistance Figure 12. Diode Forward Voltage versus Current http://onsemi.com 4 NTLTS3107P PACKAGE DIMENSIONS MICRO8 LEADLESS CASE 846C-01 ISSUE B A W Y T J SEATING PLANE NOTES: 1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE. 4. DIMENSION D APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 MM AND 0.30 MM FROM TERMINAL TIP. DIMENSION L1 IS THE TERMINAL PULL BACK FROM PACKAGE EDGE, UP TO 0.1 MM IS ACCEPTABLE. L1 IS OPTIONAL. 5. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. 6. OPTIONAL SIDE VIEW CAN SHOW LEADS 5 AND 8 REMOVED. DIM A B C D E F G H J K L L1 P U MILLIMETERS MIN MAX 3.30 BSC 3.30 BSC 0.85 0.95 0.25 0.35 1.30 1.50 2.55 2.75 0.65 BSC 0.95 1.15 0.25 BSC 0.00 0.05 0.35 0.45 0.00 0.10 1.28 1.38 0.20 --- AA 8 2X 0.15 T 2X 0.15 T NOTE 4 0.10 T W Y 0.05 T W D 8X 8 1 2 3 4 G 6X DETAIL Z U 4X ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice 1 to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800-282-9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Phone: 81-3-5773-3850 Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. EEE EEE EEE TOP VIEW E 7 6 5 INDEX AREA B 7 6 5 NOTE 6 K AA C 0.10 T 8X 0.08 T L 8X SIDE VIEW L1 F P DETAIL Z NOTE 4 SOLDERING FOOTPRINT* 2.75 H VIEW AA-AA 1.23 1.50 3.60 0.40 8X 0.58 0.65 PITCH 8X 0.33 *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 5 NTLTS3107P/D |
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